orderin g numbe r : ena1761a bi-cmos ic step-down switching regulator LV5813TT overview LV5813TT is 1ch step down switching regulator. 0.25 fet is incorporated on the upper side to achieve high-efficiency operation for large output current. compact-package msop8 (150mil) employed. current mode control type, with superior load current response and easy phase compensation. on/off pin, allowing the standby mode with the current drain of 90 a or less. pulse-by-pulse over-current protection and overheat protection available for protection of load devices. soft start pin to be provided with a capacitance for soft start. functions ? 1.5a 1ch step-down switching regulator ? over-current protection ? wide input dynamic range (4.75v to 18v) ? t h ermal shutdown ? hi gh efficiency : 90% (v in = 12v , v out = 5v, i out = 1a) ? fixed frequency : 370khz ? compact package : msop8 (150mil) ? so f t start ? standb y mode ? r e ference voltage : 0.8v applications ? lcd tv ? pdp tv ? blu-ray disc player/recorder ? fo r dsl power supply ? pre regu lator ? am usem ent specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 72110 sy/60210 sy pc 20100511-s00007 no.a1761-1/9
LV5813TT no.a1761-2/9 specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum input v in voltage v in max 20 v boot pin maximum voltage v bt max 25 v sw pin maximum voltage v sw max v in max v boot pin-sw pin maximum voltage v bs-s w max 7 v en pin maximum voltage v en max *1 v in +0. 3 v fb, comp, ss pin maximum voltage vfs max 7 v allowable power dissipation pd max with specified substrate *2 0.85 w junction temperature tj max 150 c operating temperature topr -20 to +80 c storage temperature tstg -40 to +150 c note : plan the maximum voltage while including coil and surge vo ltages, so that the maximum voltage is not exceeded even for a n instant. *1 : v in + 0 .3 < v in max *2 : specified substrate : 46.4mm 31.8mm 1 .7mm, glass epoxy substrate recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v in pin voltage v in 4.75 to 18 v boot pin voltage v bt -0.3 to 23 v sw pin voltage v sw -0.4 to v in v boot pin-sw pin maximum voltage v bs-s w 6.5 v en pin maximum voltage v en v in + 0 .3 v fb, comp, ss pin voltage v fso 6 v electrical characteristics at ta = 25c, v in = 12v, unless otherwise specified. ratings parameter symbol conditions min typ max unit ic current drain at standby i cc 1 en = 0v 90 a ic current drain in operation i cc 2 en = 5v, fb = 1v 2 ma efficiency effcy v in = 12v, i out = 1a, v o = 5v, design target *3 90 % reference voltage vref v in = 4.75v to 18v -2% 0.8 +2% v fb pin bias current iref fb = 0.8v 20 200 na high-side on resistance ronh boot = 5v 0.25 oscillation frequency f osc 296 370 444 khz oscillation frequency during short-circuit protection f oscs 85 115 145 khz en high-threshold voltage venh 0.9 1.8 2.7 v en low-threshold voltage venl 0.7 1.35 2.0 v maximum on duty d max 85 % current limit peak value 1 icl1 v in = 12v, v out = 1.2v, l = 10 h 3.1 5.7 a current limit peak value 2 icl2 v in = 12v, v out = 3.3v, l = 10 h 2.8 5.4 a current limit peak value 3 icl3 v in = 12v, v out = 5v, l = 10 h 2.5 5.1 a thermal shutdown temperature ttsd design guarantee *4 160 c thermal shutdown temperature hysteresis dtsd design guarantee *4 40 c soft start current i ss ss = 0v 3 5 7 a *3 : reference value (not tested before shipment) *4 : design guarantee (value guaranteed by design and not tested before shipment)
LV5813TT package dimensions unit : mm (typ) 3245b pd max -- ta 0 0.48 0.4 0.6 0.8 0.85 0.2 1.0 --20 80 60 20 40 0 100 ambient temperature, ta -- c allowable power dissipation, pd max -- w mounted on a specified board : 46.4 31.81.7mm 3 glass epoxy board sanyo : msop8(150mil) 3.0 1.1max 3.0 0.5 4.9 12 8 0.25 0.65 (0.53) (0.85) 0.125 0.08 specified board (top side) specifie d board (bottom side) pin assignment 8 7 6 5 ss top view en comp fb boot v in sw gnd 1 2 3 4 no.a1761-3/9
LV5813TT block diagram and sample application circuit (3.3v output) tsd vref 0.8v internal regulator internal regulator pin short protection boot 0.25 fb comp ss en +- + - + - gnd v in v in l1 : nr8040t100m [taiyo yuden] d1 : sbm30-03 [sanyo] c8 c2 : grm31cb31e106ka75 [murata] c5 c9 : c2012jb0j106m [tdk] c : ceramic capacitor l1 = 10h c2 c8 = 10f/25v 2 c6 = 0.015f r2 = 6.8k r3 = 10k r1 = 27k r10 = 4.7k c3 = 3300pf c1 = 0.022f rb = 100 v out sw osc 370khz uvlo output logic pre-drive c5 c9 = 10f/6.3v 3 d1 h : on l : off error amp pwm comparator slope comp pin function pin no. pin name description equivalent circuit 1 boot upper mos transisto r boot str ap capacitance connection pin connect the boot capacita n ce of about 0.022 f between sw pins to protect the sw pin?s absolute maximum rating, to e nsure stable operation, and to eliminate noise, the boot capacitance serial resistance (about 100 ) rb proves effective. short protection circuit sw boot output mos v in 2 v in input voltage pin. connect substantially large (10 f 2 parameters or more) capacitance between this pin and gnd. see boot 3 sw power switch pin. connect the output lc fil ter. connect the above capacitance between this pin and boot pin. see boot 4 gnd ground pin. - continued on next page. no.a1761-4/9
LV5813TT continued from preceding page. pin no. pin name description equivalent circuit 5 fb feedback pin sets the output voltage by means of split resistor in the section of the output voltage v out - fb - gnd. v out setting is made as calculated below : v out = vref {1+ (r 1 + r 10) r 3 } vref = 0.8v example : 3.3v output voltage (see block diagram and sample application cir cuit) v out = 0. 8 {1+ (27 k + 4.3 k) 10 k } = 3.304v 5a internal regulation line v in fb ss vref 0.8v 6 comp phase compensation pin connects with the phase compensation external cap acitance and resistance of dc/dc converter close loop. internal regulation line v in comp short protection circuit 7 en enable pin converter enabled when set to the high voltage and di sabled when connected to gnd. v in en 8 ss soft start pin set the soft start time by means of the built-in 5 a sour ce voltage and external soft start capacity css can be set as follows : c6 = 5 a ts s vref where, tss is soft start time and vref is the referen ce voltage. example : 2.4ms soft start time achieved css = 5 a 2.4 m s 0.8 v = 0.015 f no.a1761-5/9
LV5813TT reference data (1) i cc 1 -- ta 70 75 90 95 100 105 80 85 2.1 2.2 2.0 110 --40 --20 0 40 80 40200 80 120 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 60 100 100 ambient temperature, ta -- c i cc 2 -- ta ic current drain in operation, i cc 2 -- ma 1.9 2.3 --40 100 ambient temperature, ta -- c vref -- ta v in = 12v en = 0v v in = 12v en = 5v fb = 1v no.a1761-6/9 reference voltage, v ref -- mv 780 785 790 795 800 805 810 815 10 15 5 20 25 30 35 40 45 820 --40 --20 140 ambient temperature, ta -- c iref -- ta fb pin bias current, iref -- na 0 50 --40 100 ambient temperature, ta -- c f osc -- ta osc 290 310 330 350 370 390 410 430 18 12 6 6.0 6.5 5.0 5.5 4.0 4.5 450 80 85 90 95 --40 100 ambient temperature, ta -- c d max -- ta maximum on duty, d max -- % --40 100 ambient temperature, ta -- c f oscs -- ta short-circuit protection, f oscs -- khz 0 24 3.0 3.5 7.0 --40 100 ambient temperature, ta -- c i ss -- ta soft start current, i ss -- a --40 100 ambient temperature, ta -- c cc oscillation frequency, f -- khz oscillation frequency during ic current drain at standby, i 1 - - a v in = 12v v in = 12v fb = 0.8v v in = 12v v in = 12v v in = 12v ss = 0v v in = 12v
LV5813TT venh -- ta 0.8 1.6 2.0 2.4 1.2 1.4 1.8 2.2 1.0 2.8 --40 --20 0 40 80 20 60 --20 0 40 80 20 60 --20 0 40 80 20 60 0.5 1.0 100 ambient temperature, ta -- c venl -- ta en low-threshold voltage, venl -- v 0.6 2.6 --40 1.0 2.0 3.0 0.5 1.0 100 ambient temperature, ta -- c icl -- ta v in = 12v v in = 12v v no.a1761-7/9 current limit peak, icl - - a 2.5 3.0 3.5 4.0 4.5 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 5.5 --40 100 load current -- a current limit output voltage, v out -- v 0.0 4.0 0.0 4.0 load current -- a efficiency -- load current 84 86 88 90 92 94 4.90 4.94 4.98 5.02 5.06 5.10 0.0 1.5 load current -- a load regulation output voltage, v out -- v 0.0 1.5 ambient temperature, ta -- c ef ficiency - - % en high-threshold voltage, venh - - v in = 12v l = 10 h v in = 12v v out = 3.3v l = 10 h * l1 = 10h (cdrh105rnp-100n, sumida made), d1 = sbm30-03 (sanyo made) v out = 1.2v 3.3v 5.0v * l1 = 10h (cdrh105rnp-100n, sumida made), d1 = sbm30-03 (sanyo made) v in = 12v v out = 5v v in = 12v v out = 5v ta = 80 c * l1 = 10h (cdrh105rnp-100n, sumida made), d1 = sbm30-03 (sanyo made) * l1 = 10h (cdrh105rnp-100n, sumida made), d1 = sbm30-03 (sanyo made) 25c -30c ta = 80 c 25c -30c
LV5813TT reference data (2) (* measurement circuit is shown in ?8. sample application circuit?, v in = 12v ? v out = 3.3v) ? load tra nsient response iload = 0.5a ? 1.0a [100 sec/div] ch4:iload [0.5a/div] ch3:v out [20mv/div] ? v in st art up waveform iload = 0.5a ? v in stop waveform iload = 0.5a ch1:v in [10v/div] ch2:ss [2.0v/div] ch3:v out [2.0v/div] ch1:v in [10v/div] ch2:ss [2.0v/div] ch3:v out [2.0v/div] ? en st art up waveform iload = 0.5a ? en stop waveform iload = 0.5a ch1:en [5v/div] ch2:ss [2.0v/div] ch3:v out [2.0v/div] ch1:en [5v/div] ch2:ss [2.0v/div] ch3:v out [2.0v/div] considerations for the design ? during use with v in = 12v or less, the boot strap voltage may become deficient due to intermittent operation at no load, resulting in failure of normal operation. in this case, insert a resistance of about 500 between v out and gnd and avoid the intermittent operation mode during use. ? i nsertion of serial beads in the schottky diode for removal of noise may cause generation of the negative voltage deviating from the absolute maximum rating at the sw pin, resu lting in failure of normal operation. in such an event, do not insert beads as above described and, instead, remove noise by means of the boot resistance rb. no.a1761-8/9
LV5813TT sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of july, 2010. specifications and informat ion herein are subject to change without notice. ps no.a1761-9/9
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